<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.4">
<drawing>
<library>
<description>Silicon Laboratories&lt;p&gt;
C8051Fxxx family of mixed-signal microcontrollers integrates world-class analog,&lt;br&gt;
a high-speed pipelined 8051 CPU, ISP Flash Memory,&lt;br&gt;
and on-chip JTAG based debug in each device.&lt;br&gt;
The combination of configurable high-performance analog,&lt;br&gt;
100 MIPS 8051 core and in-system field programmability provides the user with complete design flexibility,&lt;br&gt;
improved time-to-market, superior system performance and greater end product differentiation.&lt;p&gt;

Source: http://www.silabs.com&lt;p&gt;
&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
<packages>
<package name="MLP11">
<description>&lt;b&gt;Tiny MLP package&lt;/b&gt;&lt;p&gt;
Source: http://www.silabs.com/products/microcontroller .. C8051F30xrev2_3.pdf</description>
</package>
<package name="MLP28">
<description>&lt;b&gt;MLP 28&lt;/b&gt;&lt;p&gt;
Source: www.silabs.com .. CP2101.pdf</description>
</package>
<package name="MLP20">
<description>&lt;b&gt;MLP 20&lt;/b&gt;&lt;p&gt;
Source: www.silabs.com .. C8051F33x.pdf</description>
</package>
<package name="DIL20">
<description>&lt;b&gt;Dual In Line Package&lt;/b&gt;</description>
</package>
<package name="8-PIN">
<description>&lt;b&gt;8-Pin PCB Land Pattern&lt;/b&gt;&lt;p&gt;
Source: si750.pdf</description>
</package>
<package name="QFN20">
</package>
<package name="QFN32">
</package>
</packages>
<symbols>
<symbol name="C8051F300">
<pin name="GND" direction="pwr"/>
<pin name="VCC" direction="pwr"/>
<pin name="!!RSTC2CK" direction="in"/>
<pin name="VREF/P0.0"/>
<pin name="P0.1"/>
<pin name="XTAL1/P0.2"/>
<pin name="XTAL2/P0.3"/>
<pin name="TX/P0.4"/>
<pin name="RX/P0.5"/>
<pin name="CNVSTR/P0.6"/>
<pin name="C2D/P0.7"/>
<pin name="GND@1" direction="pwr"/>
<pin name="GND@2" direction="pwr"/>
<pin name="GND@3" direction="pwr"/>
<pin name="GND@4" direction="pwr"/>
</symbol>
<symbol name="CP2101">
<pin name="REGIN" direction="pas"/>
<pin name="VDD" direction="pwr"/>
<pin name="GND" direction="pwr"/>
<pin name="VBUS" direction="in"/>
<pin name="D+"/>
<pin name="D-"/>
<pin name="!RST"/>
<pin name="SUSPEND" direction="out"/>
<pin name="!SUSPEND" direction="out"/>
<pin name="RI" direction="in"/>
<pin name="DCD" direction="in"/>
<pin name="DTR" direction="out"/>
<pin name="DSR" direction="in"/>
<pin name="TXD" direction="out"/>
<pin name="RXD" direction="in"/>
<pin name="RTS" direction="out"/>
<pin name="CTS" direction="in"/>
<pin name="GND@EXP" direction="pwr"/>
<pin name="GND@M" direction="pwr"/>
</symbol>
<symbol name="C8051F330/1">
<pin name="GND" direction="pwr"/>
<pin name="VDD" direction="pwr"/>
<pin name="!!RSTC2CK" direction="in"/>
<pin name="P0.1"/>
<pin name="GND@1" direction="pwr"/>
<pin name="GND@2" direction="pwr"/>
<pin name="P0.2"/>
<pin name="P0.3"/>
<pin name="P0.4"/>
<pin name="P0.5"/>
<pin name="P0.6"/>
<pin name="P0.7"/>
<pin name="P1.0"/>
<pin name="P0.0"/>
<pin name="P1.1"/>
<pin name="P1.2"/>
<pin name="P1.3"/>
<pin name="P1.4"/>
<pin name="P1.5"/>
<pin name="P1.6"/>
<pin name="P1.7"/>
<pin name="P2.0/C2D"/>
</symbol>
<symbol name="C8051F330D">
<pin name="GND" direction="pwr"/>
<pin name="VDD" direction="pwr"/>
<pin name="!!RSTC2CK" direction="in"/>
<pin name="P0.1"/>
<pin name="P0.2"/>
<pin name="P0.3"/>
<pin name="P0.4"/>
<pin name="P0.5"/>
<pin name="P0.6"/>
<pin name="P0.7"/>
<pin name="P1.0"/>
<pin name="P0.0"/>
<pin name="P1.1"/>
<pin name="P1.2"/>
<pin name="P1.3"/>
<pin name="P1.4"/>
<pin name="P1.5"/>
<pin name="P1.6"/>
<pin name="P1.7"/>
<pin name="P2.0/C2D"/>
</symbol>
<symbol name="SI570">
<pin name="OE" direction="in"/>
<pin name="SDA" direction="in"/>
<pin name="SCL" direction="in"/>
<pin name="CLK-" direction="out"/>
<pin name="CLK+" direction="out"/>
<pin name="GND" direction="pwr"/>
<pin name="VDD" direction="pwr"/>
</symbol>
<symbol name="SI571">
<pin name="OE" direction="in"/>
<pin name="SDA" direction="in"/>
<pin name="SCL" direction="in"/>
<pin name="CLK-" direction="out"/>
<pin name="CLK+" direction="out"/>
<pin name="GND" direction="pwr"/>
<pin name="VDD" direction="pwr"/>
<pin name="VC" direction="in"/>
</symbol>
<symbol name="SI472X">
<pin name="FMI"/>
<pin name="RFGND"/>
<pin name="TXO"/>
<pin name="!RST"/>
<pin name="!SEN"/>
<pin name="SCLK"/>
<pin name="SDIO"/>
<pin name="RCLK"/>
<pin name="LIN/DFS"/>
<pin name="VIO"/>
<pin name="VDD"/>
<pin name="ROUT/DIN"/>
<pin name="LOUT/DFS"/>
<pin name="RIN/DOUT"/>
<pin name="GPO3/DCLK"/>
<pin name="GPO2/INT"/>
<pin name="GPO1"/>
<pin name="GND"/>
</symbol>
<symbol name="C8051F381/3/5/7">
<pin name="VDD"/>
<pin name="!RST!/C2CK"/>
<pin name="P0.0"/>
<pin name="P0.1"/>
<pin name="XTAL1/P0.2"/>
<pin name="XTAL2/P0.3"/>
<pin name="P0.4"/>
<pin name="P0.5"/>
<pin name="CNVSTR/P0.6"/>
<pin name="VREF/P0.7"/>
<pin name="P3.0/C2D"/>
<pin name="GND"/>
<pin name="REGIN"/>
<pin name="VBUS"/>
<pin name="D+"/>
<pin name="D-"/>
<pin name="P1.0"/>
<pin name="P1.1"/>
<pin name="P1.2"/>
<pin name="P1.3"/>
<pin name="P1.4"/>
<pin name="P1.5"/>
<pin name="P1.6"/>
<pin name="P1.7"/>
<pin name="P2.0"/>
<pin name="P2.1"/>
<pin name="P2.2"/>
<pin name="P2.3"/>
<pin name="P2.4"/>
<pin name="P2.5"/>
<pin name="P2.6"/>
<pin name="P2.7"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="C8051F30*" prefix="IC">
<description>&lt;b&gt;25 MIPS, 8 kB Flash, 8-Bit ADC, 11-Pin Mixed-Signal MCU&lt;/b&gt;&lt;p&gt;
Source: http://www.silabs.com/products/microcontroller .. C8051F30xrev2_3.pdf</description>
<gates>
<gate name="G$1" symbol="C8051F300"/>
</gates>
<devices>
<device name="" package="MLP11">
<connects>
<connect gate="G$1" pin="!!RSTC2CK" pad="8"/>
<connect gate="G$1" pin="C2D/P0.7" pad="10"/>
<connect gate="G$1" pin="CNVSTR/P0.6" pad="9"/>
<connect gate="G$1" pin="GND" pad="G"/>
<connect gate="G$1" pin="GND@1" pad="G1"/>
<connect gate="G$1" pin="GND@2" pad="G2"/>
<connect gate="G$1" pin="GND@3" pad="G3"/>
<connect gate="G$1" pin="GND@4" pad="G4"/>
<connect gate="G$1" pin="P0.1" pad="2"/>
<connect gate="G$1" pin="RX/P0.5" pad="7"/>
<connect gate="G$1" pin="TX/P0.4" pad="6"/>
<connect gate="G$1" pin="VCC" pad="3"/>
<connect gate="G$1" pin="VREF/P0.0" pad="1"/>
<connect gate="G$1" pin="XTAL1/P0.2" pad="4"/>
<connect gate="G$1" pin="XTAL2/P0.3" pad="5"/>
</connects>
<technologies>
<technology name="0">
<attribute name="MF" value=""/>
<attribute name="MPN" value="C8051F300-GM"/>
<attribute name="OC_FARNELL" value="4128310"/>
<attribute name="OC_NEWARK" value="96K8386"/>
</technology>
<technology name="1">
<attribute name="MF" value=""/>
<attribute name="MPN" value="C8051F301-GM"/>
<attribute name="OC_FARNELL" value="1291497"/>
<attribute name="OC_NEWARK" value="24M1228"/>
</technology>
<technology name="2">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="9685812"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
<technology name="3">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="unknown"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
<technology name="4">
<attribute name="MF" value=""/>
<attribute name="MPN" value="C8051F304-GM"/>
<attribute name="OC_FARNELL" value="1291498"/>
<attribute name="OC_NEWARK" value="24M1229"/>
</technology>
<technology name="5">
<attribute name="MF" value=""/>
<attribute name="MPN" value="C8051F305-GM"/>
<attribute name="OC_FARNELL" value="1291499"/>
<attribute name="OC_NEWARK" value="24M1230"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CP210*" prefix="IC">
<description>&lt;b&gt;Single-Chip USB to UART Bridge&lt;/b&gt;&lt;p&gt;
Source: www.silabs.com .. CP2101.pdf / cp2102.pdf</description>
<gates>
<gate name="G$1" symbol="CP2101"/>
</gates>
<devices>
<device name="" package="MLP28">
<connects>
<connect gate="G$1" pin="!RST" pad="9"/>
<connect gate="G$1" pin="!SUSPEND" pad="11"/>
<connect gate="G$1" pin="CTS" pad="23"/>
<connect gate="G$1" pin="D+" pad="4"/>
<connect gate="G$1" pin="D-" pad="5"/>
<connect gate="G$1" pin="DCD" pad="1"/>
<connect gate="G$1" pin="DSR" pad="27"/>
<connect gate="G$1" pin="DTR" pad="28"/>
<connect gate="G$1" pin="GND" pad="3"/>
<connect gate="G$1" pin="GND@EXP" pad="EXP"/>
<connect gate="G$1" pin="GND@M" pad="M"/>
<connect gate="G$1" pin="REGIN" pad="7"/>
<connect gate="G$1" pin="RI" pad="2"/>
<connect gate="G$1" pin="RTS" pad="24"/>
<connect gate="G$1" pin="RXD" pad="25"/>
<connect gate="G$1" pin="SUSPEND" pad="12"/>
<connect gate="G$1" pin="TXD" pad="26"/>
<connect gate="G$1" pin="VBUS" pad="8"/>
<connect gate="G$1" pin="VDD" pad="6"/>
</connects>
<technologies>
<technology name="1">
<attribute name="MF" value="FARNELL"/>
<attribute name="MPN" value="CP2102-GM"/>
<attribute name="OC_FARNELL" value="9282130"/>
<attribute name="OC_NEWARK" value="30K5635"/>
</technology>
<technology name="2">
<attribute name="MF" value="FARNELL"/>
<attribute name="MPN" value="CP2102-GM"/>
<attribute name="OC_FARNELL" value="9282130"/>
<attribute name="OC_NEWARK" value="30K5635"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="C8051F330*" prefix="IC">
<description>&lt;b&gt;8kB ILP Flash MCU Family&lt;/b&gt;&lt;p&gt;
Source: www.silabs.com .. C8051F33x.pdf</description>
<gates>
<gate name="G$1" symbol="C8051F330/1"/>
</gates>
<devices>
<device name="" package="MLP20">
<connects>
<connect gate="G$1" pin="!!RSTC2CK" pad="4"/>
<connect gate="G$1" pin="GND" pad="2"/>
<connect gate="G$1" pin="GND@1" pad="M"/>
<connect gate="G$1" pin="GND@2" pad="EXP"/>
<connect gate="G$1" pin="P0.0" pad="1"/>
<connect gate="G$1" pin="P0.1" pad="20"/>
<connect gate="G$1" pin="P0.2" pad="19"/>
<connect gate="G$1" pin="P0.3" pad="18"/>
<connect gate="G$1" pin="P0.4" pad="17"/>
<connect gate="G$1" pin="P0.5" pad="16"/>
<connect gate="G$1" pin="P0.6" pad="15"/>
<connect gate="G$1" pin="P0.7" pad="14"/>
<connect gate="G$1" pin="P1.0" pad="13"/>
<connect gate="G$1" pin="P1.1" pad="12"/>
<connect gate="G$1" pin="P1.2" pad="11"/>
<connect gate="G$1" pin="P1.3" pad="10"/>
<connect gate="G$1" pin="P1.4" pad="9"/>
<connect gate="G$1" pin="P1.5" pad="8"/>
<connect gate="G$1" pin="P1.6" pad="7"/>
<connect gate="G$1" pin="P1.7" pad="6"/>
<connect gate="G$1" pin="P2.0/C2D" pad="5"/>
<connect gate="G$1" pin="VDD" pad="3"/>
</connects>
<technologies>
<technology name="/1">
<attribute name="MF" value=""/>
<attribute name="MPN" value="C8051F330-GM"/>
<attribute name="OC_FARNELL" value="1291513"/>
<attribute name="OC_NEWARK" value="24M1242"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="C8051F330D" prefix="IC">
<description>&lt;b&gt;8kB ILP Flash MCU Family&lt;/b&gt;&lt;p&gt;
Source: www.silabs.com .. C8051F33x.pdf</description>
<gates>
<gate name="G$1" symbol="C8051F330D"/>
</gates>
<devices>
<device name="" package="DIL20">
<connects>
<connect gate="G$1" pin="!!RSTC2CK" pad="7"/>
<connect gate="G$1" pin="GND" pad="5"/>
<connect gate="G$1" pin="P0.0" pad="4"/>
<connect gate="G$1" pin="P0.1" pad="3"/>
<connect gate="G$1" pin="P0.2" pad="2"/>
<connect gate="G$1" pin="P0.3" pad="1"/>
<connect gate="G$1" pin="P0.4" pad="20"/>
<connect gate="G$1" pin="P0.5" pad="19"/>
<connect gate="G$1" pin="P0.6" pad="18"/>
<connect gate="G$1" pin="P0.7" pad="17"/>
<connect gate="G$1" pin="P1.0" pad="16"/>
<connect gate="G$1" pin="P1.1" pad="15"/>
<connect gate="G$1" pin="P1.2" pad="14"/>
<connect gate="G$1" pin="P1.3" pad="13"/>
<connect gate="G$1" pin="P1.4" pad="12"/>
<connect gate="G$1" pin="P1.5" pad="11"/>
<connect gate="G$1" pin="P1.6" pad="10"/>
<connect gate="G$1" pin="P1.7" pad="9"/>
<connect gate="G$1" pin="P2.0/C2D" pad="8"/>
<connect gate="G$1" pin="VDD" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="unknown"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SI570" prefix="IC">
<description>&lt;b&gt;ANY-RATE I2C PROGRAMMABLE XO/VCXO&lt;/b&gt;&lt;p&gt;
Source: si570.pdf</description>
<gates>
<gate name="G$1" symbol="SI570"/>
</gates>
<devices>
<device name="" package="8-PIN">
<connects>
<connect gate="G$1" pin="CLK+" pad="4"/>
<connect gate="G$1" pin="CLK-" pad="5"/>
<connect gate="G$1" pin="GND" pad="3"/>
<connect gate="G$1" pin="OE" pad="2"/>
<connect gate="G$1" pin="SCL" pad="8"/>
<connect gate="G$1" pin="SDA" pad="7"/>
<connect gate="G$1" pin="VDD" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="unknown"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SI571" prefix="IC">
<description>&lt;b&gt;ANY-RATE I2C PROGRAMMABLE XO/VCXO&lt;/b&gt;&lt;p&gt;
Source: si570.pdf</description>
<gates>
<gate name="G$1" symbol="SI571"/>
</gates>
<devices>
<device name="" package="8-PIN">
<connects>
<connect gate="G$1" pin="CLK+" pad="4"/>
<connect gate="G$1" pin="CLK-" pad="5"/>
<connect gate="G$1" pin="GND" pad="3"/>
<connect gate="G$1" pin="OE" pad="2"/>
<connect gate="G$1" pin="SCL" pad="8"/>
<connect gate="G$1" pin="SDA" pad="7"/>
<connect gate="G$1" pin="VC" pad="1"/>
<connect gate="G$1" pin="VDD" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value=""/>
<attribute name="MPN" value=""/>
<attribute name="OC_FARNELL" value="unknown"/>
<attribute name="OC_NEWARK" value="unknown"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SI472X">
<gates>
<gate name="G$1" symbol="SI472X"/>
</gates>
<devices>
<device name="" package="QFN20">
<connects>
<connect gate="G$1" pin="!RST" pad="5"/>
<connect gate="G$1" pin="!SEN" pad="6"/>
<connect gate="G$1" pin="FMI" pad="2"/>
<connect gate="G$1" pin="GND" pad="12 PAD"/>
<connect gate="G$1" pin="GPO1" pad="19"/>
<connect gate="G$1" pin="GPO2/INT" pad="18"/>
<connect gate="G$1" pin="GPO3/DCLK" pad="17"/>
<connect gate="G$1" pin="LIN/DFS" pad="16"/>
<connect gate="G$1" pin="LOUT/DFS" pad="14"/>
<connect gate="G$1" pin="RCLK" pad="9"/>
<connect gate="G$1" pin="RFGND" pad="3"/>
<connect gate="G$1" pin="RIN/DOUT" pad="15"/>
<connect gate="G$1" pin="ROUT/DIN" pad="13"/>
<connect gate="G$1" pin="SCLK" pad="7"/>
<connect gate="G$1" pin="SDIO" pad="8"/>
<connect gate="G$1" pin="TXO" pad="4"/>
<connect gate="G$1" pin="VDD" pad="11"/>
<connect gate="G$1" pin="VIO" pad="10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="C8051F381/3/5/7" prefix="U">
<gates>
<gate name="G$1" symbol="C8051F381/3/5/7"/>
</gates>
<devices>
<device name=".QFN" package="QFN32">
<connects>
<connect gate="G$1" pin="!RST!/C2CK" pad="9"/>
<connect gate="G$1" pin="CNVSTR/P0.6" pad="28"/>
<connect gate="G$1" pin="D+" pad="4"/>
<connect gate="G$1" pin="D-" pad="5"/>
<connect gate="G$1" pin="GND" pad="3 PAD" route="any"/>
<connect gate="G$1" pin="P0.0" pad="2"/>
<connect gate="G$1" pin="P0.1" pad="1"/>
<connect gate="G$1" pin="P0.4" pad="30"/>
<connect gate="G$1" pin="P0.5" pad="29"/>
<connect gate="G$1" pin="P1.0" pad="26"/>
<connect gate="G$1" pin="P1.1" pad="25"/>
<connect gate="G$1" pin="P1.2" pad="24"/>
<connect gate="G$1" pin="P1.3" pad="23"/>
<connect gate="G$1" pin="P1.4" pad="22"/>
<connect gate="G$1" pin="P1.5" pad="21"/>
<connect gate="G$1" pin="P1.6" pad="20"/>
<connect gate="G$1" pin="P1.7" pad="19"/>
<connect gate="G$1" pin="P2.0" pad="18"/>
<connect gate="G$1" pin="P2.1" pad="17"/>
<connect gate="G$1" pin="P2.2" pad="16"/>
<connect gate="G$1" pin="P2.3" pad="15"/>
<connect gate="G$1" pin="P2.4" pad="14"/>
<connect gate="G$1" pin="P2.5" pad="13"/>
<connect gate="G$1" pin="P2.6" pad="12"/>
<connect gate="G$1" pin="P2.7" pad="11"/>
<connect gate="G$1" pin="P3.0/C2D" pad="10"/>
<connect gate="G$1" pin="REGIN" pad="7"/>
<connect gate="G$1" pin="VBUS" pad="8"/>
<connect gate="G$1" pin="VDD" pad="6"/>
<connect gate="G$1" pin="VREF/P0.7" pad="27"/>
<connect gate="G$1" pin="XTAL1/P0.2" pad="32"/>
<connect gate="G$1" pin="XTAL2/P0.3" pad="31"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
