<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.6.0">
<drawing>
<library>
<packages>
<package name="TSSOP24">
<description>&lt;b&gt;24-Lead Thin Shrink Small Outline Package TSSOP&lt;/b&gt; (RU-24)&lt;p&gt;
Source: http://www.analog.com/UploadedFiles/Data_Sheets/39677768AD7714_c.pdf</description>
</package>
</packages>
<symbols>
<symbol name="FT240X_FIFO">
<pin name="/RD"/>
<pin name="/RXF"/>
<pin name="/TXE"/>
<pin name="D0"/>
<pin name="D1"/>
<pin name="D2"/>
<pin name="D3"/>
<pin name="D4"/>
<pin name="D5"/>
<pin name="D6"/>
<pin name="D7"/>
<pin name="WR"/>
</symbol>
<symbol name="FT240X_MISC">
<pin name="/RESET"/>
<pin name="/SIWU"/>
<pin name="CBUS5"/>
<pin name="CBUS6"/>
</symbol>
<symbol name="FT240X_PWR">
<pin name="3V3OUT" direction="out"/>
<pin name="GND@6" direction="pwr"/>
<pin name="GND@19" direction="pwr"/>
<pin name="VCC" direction="in"/>
<pin name="VCCIO" direction="in"/>
<pin name="VCORE" direction="pas"/>
</symbol>
<symbol name="FTDI_USB">
<pin name="USBDM"/>
<pin name="USBDP"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="FT240X" prefix="IC">
<gates>
<gate name="_FIFO" symbol="FT240X_FIFO"/>
<gate name="_MISC" symbol="FT240X_MISC"/>
<gate name="_PWR" symbol="FT240X_PWR"/>
<gate name="_USB" symbol="FTDI_USB"/>
</gates>
<devices>
<device name="S" package="TSSOP24">
<connects>
<connect gate="_FIFO" pin="/RD" pad="11"/>
<connect gate="_FIFO" pin="/RXF" pad="21"/>
<connect gate="_FIFO" pin="/TXE" pad="20"/>
<connect gate="_FIFO" pin="D0" pad="24"/>
<connect gate="_FIFO" pin="D1" pad="4"/>
<connect gate="_FIFO" pin="D2" pad="2"/>
<connect gate="_FIFO" pin="D3" pad="9"/>
<connect gate="_FIFO" pin="D4" pad="1"/>
<connect gate="_FIFO" pin="D5" pad="7"/>
<connect gate="_FIFO" pin="D6" pad="8"/>
<connect gate="_FIFO" pin="D7" pad="5"/>
<connect gate="_FIFO" pin="WR" pad="12"/>
<connect gate="_MISC" pin="/RESET" pad="16"/>
<connect gate="_MISC" pin="/SIWU" pad="10"/>
<connect gate="_MISC" pin="CBUS5" pad="23"/>
<connect gate="_MISC" pin="CBUS6" pad="22"/>
<connect gate="_PWR" pin="3V3OUT" pad="15"/>
<connect gate="_PWR" pin="GND@19" pad="19"/>
<connect gate="_PWR" pin="GND@6" pad="6"/>
<connect gate="_PWR" pin="VCC" pad="18"/>
<connect gate="_PWR" pin="VCCIO" pad="3"/>
<connect gate="_PWR" pin="VCORE" pad="17"/>
<connect gate="_USB" pin="USBDM" pad="14"/>
<connect gate="_USB" pin="USBDP" pad="13"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
